The present invention is related to operational amplifier output stages. More particular, the present invention is related to an output stage that includes a dynamically activated CMOS drive circuit that is arranged to improve the drive characteristics of the operational amplifier. Additional circuitry may be arranged to enhance the high frequency performance of the CMOS drive circuit by discharging critical nodes and reducing the quiescent current of the operational amplifier.
Operational amplifiers are a basic building block in electronic systems. Typical operational amplifiers are two-stage amplifiers that include an input stage and an output stage. The input stage is arranged to receive a differential input signal and provide an intermediary signal at an intermediary node. The differential input signal is related to the differential input signal according to a first gain. The output stage is arranged to receive the intermediary signal and provide an output signal to an output node. The output signal is related to the intermediary signal according to a second gain. The output signal is related to the differential input signal according to the product of the first and second gains.
Two-stage operational amplifiers often have high gain levels that may become unstable at high frequencies. Instability in the operational amplifier may cause problems such as oscillations in the output signal. An AC compensation circuit is coupled to a high gain node in the operational amplifier to reduce the gain such that the operational amplifier is stable over all relevant operating frequencies. The AC compensation circuit is often provided between the intermediary node and the output node. The AC compensation circuit reduces high frequency gain by bypassing the output stage.
Briefly stated, an output stage for an operational amplifier includes a dynamically activated CMOS drive circuit that is arranged to improve the drive characteristics of the operational amplifier. The output stage includes bipolar transistors that are arranged to clamp the signal swing at an intermediary node in the operational amplifier. The bipolar transistors activate respective portions of the CMOS drive circuit based on the signal drive at the intermediary node. The CMOS driver circuit includes a p-type field effect transistor that sources additional current into the output signal when active, and an n-type field effect transistor that sinks additional current from the output terminal when active. The output stage may include additional circuitry to ensure that parasitic capacitances associated with the gates of the p-type field effect transistor and the n-type field effect transistors are discharged at appropriate times such that power consumption is reduced and high-speed operation is enhanced.
A more complete appreciation of the present invention and its improvements can be obtained by reference to the accompanying drawings, which are briefly summarized below, to the following detailed description of illustrative embodiments of the invention, and to the appended claims.